// SYSTEMS DISPATCH ARCHIVE

Engineering dispatches, written for the field.

Field memos and protocol notes, written by the engineers doing the work and sent out as we finish them.

DISPATCH #26-03 14 min memo
SUBSTATION PROTOCOLS

The Illusion of the Air-Gap: Protocol Vulnerabilities in Modern Substation Networks

What happens when a maintenance laptop bridges an IEC 61850 substation LAN to a public cellular connection. Covers unidirectional optical data diodes and hardware-enforced protocol boundaries.

// CORE FINDINGS
  • Vendor diagnostics are the weak point: maintenance laptops regularly bridge air-gapped station buses to public cellular links.
  • Hardware-enforced cryptographic sequence counters shut down GOOSE message spoofing entirely.
  • An optical data diode gives you telemetry export that is physically one-way and non-routable, without exposing a single substation controller.
#IEC 61850 #Substation Security #Hardware Diodes
DISPATCH #26-02 18 min memo
REMOTE OPERATIONS

Surviving the Great Disconnect: Designing SCADA for 30-Day Satellite Blackouts

How to engineer remote pipeline valve manifolds and arctic pumping stations that keep working with no WAN. Covers NVRAM state preservation and autonomous mechanical safe states.

// CORE FINDINGS
  • Remote pipeline corridors lose satellite and cellular links every season, and the outages routinely run past 72 hours.
  • An edge controller has to keep local telemetry history in non-volatile circular buffers without ever stalling the actuator loop.
  • Autonomous shut-in should key off physical pressure gradient divergence, not a network heartbeat that stopped arriving.
#Remote Edge #Pipeline SCADA #Fail-Safe Design
DISPATCH #26-01 11 min memo
GRID RELIABILITY

Predicting Transformer Thermal Runaway with Sub-Cycle Phase Analytics

How high-frequency synchrophasor measurements (IEEE C37.118) at 120 frames per second catch inter-turn winding degradation before the dielectric oil breaks down.

// CORE FINDINGS
  • Sub-cycle phase angle drift shows micro-arcing 48 to 72 hours before a dissolved gas analysis (DGA) alarm ever triggers.
  • At 120 FPS you can compare phase differentially across primary and secondary windings.
  • Feeding samples straight into the FPGA and microkernel means no dropped buffers during a severe grid transient.
#Synchrophasors #IEEE C37.118 #Asset Health
DISPATCH #25-11 16 min memo
REGULATORY POSTURE

The European NIS2 Directive: Practical Steps for Energy Transmission Operators

Implementation notes for Articles 21 and 23 of the EU NIS2 Directive, covering automated incident reporting and software bill of materials (SBOM) tracking through the supply chain.

// CORE FINDINGS
  • NIS2 requires an automated early warning within 24 hours of a suspected operational compromise. Manual escalation will not make that window.
  • SBOM tracking has to reach into embedded RTU firmware and third-party protocol stacks, not just application dependencies.
  • Air-gapped verification logs satisfy a European auditor without opening the operational network to cloud egress.
#NIS2 Directive #Critical Infrastructure #Audit Readiness
DISPATCH #25-10 15 min memo
ANALYTICS ARCHITECTURE

Client-Side Incremental View Maintenance: Embedded DBSP and Apache Arrow

How in-process streaming queries work: embedding Z-sets and compressed Apache Arrow columnar batches in the host application gives sub-microsecond query response with the data never leaving the device.

// CORE FINDINGS
  • Repeated SQL polling over history is what causes memory churn and CPU spikes inside a client application.
  • Evaluating query differentials (DBSP Z-sets) keeps rolling metrics in O(Δ) time instead of O(N) full scans.
  • Aggregating locally keeps sensitive user and biometric data on the device, which removes the third-party tracking risk rather than mitigating it.
#DBSP #Apache Arrow #In-Process Compute
DISPATCH #25-08 22 min memo
EMBEDDED SYSTEMS

Practical no-std Rust in Hard Real-Time Industrial Control

Why we chose no-std Rust for real-time SCADA firmware, with the zero-allocation buffers, execution timing and compile-time state machine guarantees that came with it.

// CORE FINDINGS
  • Dynamic heap allocation, in C++ or standard Rust, produces latency spikes exactly when memory has fragmented.
  • Allocate the circular ring buffers and lookup tables at boot and execution jitter stays strictly under 10 microseconds.
  • Rust's affine type system rules out invalid actuator state transitions at compile time, so they never exist at runtime.
#Rust #no-std #Deterministic Timing
ENGINEERING DISPATCH

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